FPGA

Physically unclonable functions (PUFs) are foundational components that offer a cost-efficient and promising solution for diverse security applications, including countering integrated circuit (IC) counterfeiting, generating secret keys, and enabling lightweight authentication. PUFs exploit semiconductor variations in ICs to derive inherent responses from imposed challenges, creating unique challenge-response pairs (CRPs) for individual devices. Analyzing PUF security is pivotal for identifying device vulnerabilities and ensuring response credibility.

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Cacheaccel Simulator trace files and project files are uploaded.

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This repository includes the data collected from the aocl profile and the Jupyter notebooks with the memory model equations proposed. Application folder contains a set of benchmarks to validate the proposed model.

The model was developed using the Quartus aocl version 18.1 for Stratix10 GX and 19.4 for Stratix10MX

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With a large number of all-controlled switching devices of converters in MMC-HVDC system and the frequency-dependent characteristics of line impedance in the electromagnetic transient model of HVDC transmission line, the real-time simulation platform calls for subtle time step and high calculation accuracy. The calculation parameters are prestored in advance so that they can be obtained by looking up tables in the calculation process, which reduces the computational load of simulation calculation of MMC-HVDC system.

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