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Cacheaccel_Simulator

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Citation Author(s):: Shivani Shah

Nanditha Rao
Submitted by:: Shivani Shah
Last updated:: Thu, 02/17/2022 - 09:58
DOI:: 10.21227/ad0c-ga03

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Abstract

Cacheaccel Simulator trace files and project files are uploaded.

Instructions:

These files need to be run with Xilinx Vivado 2019.1 version.

Dataset Files

Trace files provided as input to Cacheaccel (Size: 115.4 MB)

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DATASET SCRIPTS

Singlecore framework of Cacheaccel

Multicore framework of Cacheaccel

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