Ultra-Low-Voltage Flip-Flops and Near-Threshold Modeling

Name: Ultra-Low-Voltage Flip-Flops and Near-Threshold Modeling
Creator: Anuradha Ranasinghe
License: https://creativecommons.org/licenses/by/4.0/
Keywords: IoT

Citation Author(s):: Anuradha Ranasinghe (University of Twente)
Submitted by:: Anuradha Ranasinghe
Last updated:: Wed, 01/05/2022 - 09:46
DOI:: 10.21227/0a2t-jg52

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Categories:

Keywords:

Flip-Flops

Single Edge Triggering

Ultra Low Power

Clock Network Power

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Abstract

The cell characterization scripts and ultra low voltage flip-flop design information including 320-bit (16x20) parallel shift register design....

If you use this data, please add the citation to the following paper :

https://ieeexplore.ieee.org/abstract/document/9643770

Instructions:

Cell characterization scripts are intended to be used with Cadence Liberate tool.....

If you use this data, please add the citation to the following paper : https://scholar.google.com/citations?view_op=view_citation&hl=en&user=PloAIo8AAAAJ&alert_preview_top_rm=2&citation_for_view=PloAIo8AAAAJ:M3ejUd6NZC8C

Anuradha Ranasinghe Wed, 01/05/2022 - 09:44 Permalink