Pulse Shrinking TDC Vivado Project

Citation Author(s):
Li
Xiang
Submitted by:
Li Xiang
Last updated:
Tue, 07/06/2021 - 02:58
DOI:
10.21227/svj3-8h11
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Abstract 

Pulse Shrinking TDC utilizing the FPGA cell block Architecture. Ultra Compact Design.

Instructions: 

Abstract The supplementary material is Vivado Project File in Zip format (with Test-bench code) .  Recommended Vivado Version : 2019.1  Test bench is included, just Run Simulation to obtain local results

Documentation

AttachmentSize
File supplementary_tim_21_02156.pdf792.49 KB