80 fs TDC by crosstalking approach
A pulse stretching Time to Digital Converter (TDC) exploits the crosstalk effect on FPGA routing tracks is proposed. The principle idea is to superpose an induction voltage on the rising edge to lower its logic high toggling point while maintaining the falling edge intact. Thanks to the constant back induction voltage on the coupled transmission line, logic pulses can be stretched in a consistent manner.
The focus of this cross-talking TDC is to ameliorate the delay variations caused by temperature changes on conventional TDC designs.
Experiments were conducted at different temperatures on commercial devices. During tests, the single shot precision, the effective resolution, and the non-linearity performance have all reached state-of-the-art. Noting that, 80fs resolution was observed. Most importantly, improvement on temperature stability is confirmed.
This project is intended to provide a reference design for fs resolution TDC. It has been verified on a 16 nm SOI FinFET Xilinx ZYNQ chip. This design certainly has the potential for better resolutions.