Logic gates
The dataset and source code used in paper "Pick the Better and Leave the Rest: Leveraging Multiple Retrieved Results to Guide Response Generation".
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Data used to produce figures 5-7 in the paper Multi-Gate In-plane Actuated NEMS Relays for Effective Complementary Logic Gate Designs as well as tables 1 and 2. Figure 5 shows input and output data collected from a 3-input NAND gate comprised of a novel multi-gate (multi-input relay). Figures 6 and 7 present data from COMSOL simulations indended to outline a procedere for optimizing these relays and allow for scaling of the device parameters. Table 1 compares our designs with those of other works, in terms of number of relays and critical path. Table 2 compares the parameters
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