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Standard Dataset
HRALM multiplier - supplemental materials
- Citation Author(s):
-
RatkoPilipović
Faculty of Computer and Information Science, University in Ljubljana - Submitted by:
- Ratko Pilipovic
- Last updated:
- Sun, 05/23/2021 - 08:34
- DOI:
- 10.21227/5s5w-6074
- License:
87 Views- Categories:
- Keywords:
Abstract
This code is provided here for research purpose(s) only. You are allowed to use this code/data provided that you cite the following paper:
U. Lotrič, R. Pilipović, and P. Bulić, “A Hybrid Radix-4 and Approximate Logarithmic Multiplier for Energy Efficient Image Processing,” Electronics, vol. 10, no. 10, p. 1175, May 2021 [Online]. Available: http://dx.doi.org/10.3390/electronics10101175
For questions and suggestions, please email Ratko Pilipović (ratko.pilipovic@fri.uni-lj.si).
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This code is provided here for research purpose(s) only. For questions and suggestions, please email Ratko Pilipović (ratko.pilipovic@fri.uni-lj.si).
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This directory contains the Verilog sources of our paper, “A Hybrid Radix-4 and Approximate Logarithmic Multiplier for Energy Efficient Image Processing,”
Directory content
- verilog/ -> Verilog source files for 16-bit ELM multipliers
- synthesis/src/ -> Verilog code of HRALM2 multiplier
- synthesis/constraint.sdc -> Used constraints in synthesis
- synthesis/config.mk -> Used configuration in synthesis
- synthesis/reports/ -> reports from different stages of OpenROAD synthesis flow
- synthesis/results/ -> output files from different stages of OpenROAD synthesis flow, including the final GDS file
