Dataset: Cryogenic-Aware Forward Body Biasing in Bulk CMOS

Cryogenic CMOS (cryo-CMOS) circuits are of-
ten hindered by the cryogenic threshold-voltage increase.
To mitigate such an increase, a forward body biasing (FBB)
technique in bulk CMOS is proposed, which can reliably
operate up to the nominal supply without problematic leak-
age currents, thanks to the larger diode turn-on voltage
at cryogenic temperatures. As a result, traditional circuits,
such as pass-gates, can reliably operate down to 4.2 K, and
their performance is augmented, e.g., digital circuits speed-
ing up by 1.62× or lowering their energy per transition
and energy-delay product by 4.24× and 2.33×, respectively.
Unlike back biasing in FD-SOI, here all FBB voltages remain
within the supplies, hence enabling on-chip, dynamic and
device-specific biasing. The proposed FBB technique thus
represents a valuable design tool for bulk cryo-CMOS cir-
cuits.