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Standard Dataset

Compact Model Implementation of A Dynamic Ferroelectric Model

Citation Author(s):
Lining ZHANG (Peking University )
Submitted by:
Lining Zhang
Last updated:
DOI:
10.21227/yzc1-bq51
Data Format:
No Ratings Yet

Abstract

This dataset is a Verilog-a implementation of a dynamic compact model of ferroelectric capacitance. It can be run with a SPICE-type circuit simulator. 

Researchers using this dataset should cite it as follows: Ning Feng, Hao Li, Chang Su, Lining Zhang, Qianqian Huang,Runsheng Wang, and Ru Huang,  A Dynamic Compact Model for Ferroelectric Capacitance, IEEE Electron Device Letters, DOI: 10.1109/LED.2022.3141413

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