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First Name: 
Sushil
Last Name: 
Silwal

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These controller design and simulation files correspond to the paper "A Multivariable Controller in Synchronous Frame Integrating Phase-Locked Loop to Enhance Performance of Three-Phase Grid-connected Inverters in Weak Grids" which presents a new current controller in the synchronous reference frame and its associated design for enhancing the performance of three-phase grid-connected inverters, especially against weak-grid conditions.

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