Simulation files for paper: Low-Cost LED Driver based on a Low-Dropout Current Regulator Combined with a Quasi-Resonant Buck Pre-Regulator
Simulation files for the paper "Low-Cost LED Driver based on a Low-Dropout Current Regulator Combined with a Quasi-Resonant Buck Pre-Regulator"
Requires LT Spice version XVII or later.
All files included were generated using the free LTspice XVII simulator as supplementary information to the article titled “Low-Cost LED Driver based on a Low-Dropout Current Regulator Combined with a Quasi-Resonant Buck Pre-Regulator”.
As of the date of writing this document, the manufacturer of the L6562A control integrated circuit does not provide a model compatible with LTspice, so a state machine has been used to simulate its behavior in an idealized way. This state machine implements what is called ZC-ton control in the article. In this control, the transistor is activated just after the zero crossing of the voltage across its terminals, and it is turned off after a time set by the ton signal. This state machine has two main states: “OFF” and “ON”, and two transition states: “capture_t0” and “capture_t1”. The latter are only used to capture the value of the internal variable "time" at the instants in which the states "OFF" and "ON" are exited. This step is necessary to calculate the time that the state machine remains in the “ON” state, and to implement a protection that forces switching on if too long a time passes without the zero crossing being detected (toffmax) or inhibits if it is detected in too short a time (toffmin).
To obtain the frequency response of the converter, the procedure described in [X] has been used. This procedure is based on the use of the STEP command to simulate the transient behavior of the circuit for multiple perturbation frequencies to, later, use the MEASURE command to obtain the gain and phase relationships for each perturbation frequency.
Proper adjustment of the “Maximum timestep” parameter is critical due to how timeouts are calculated in the state-machine. This parameter is defined in the TRAN directive, which controls transient analysis, and it must be set below 100 ns to reduce the apparent noise in the converter signals.
2. File description
a. Files for verification of the proposed simplified dynamic model
In the article, a procedure is proposed to obtain the simplified small-signal dynamic model of the quasi-resonant buck converter. This procedure is based on neglecting the effect on the dynamics of the inductance and the resonant capacitor. The file: “Idealized quasi-resonant buck_Open-loop small-signal ton-Vout Bode plot .asc” can be used to check the accuracy of the model obtained based on these assumptions.
In this LTspice file, an output current Iout of 0.6 A has been set with a ton of 6.51 microseconds, which makes the output voltage Vout stabilize at 16.75 V, which is the upper value of the range described in the article.
b. Verification of the system loop-gain
The file “Idealized quasi-resonant buck_Closed-loop small-signal loop-gain Bode plot .asc” is a modification of the one used in the previous section where the effect of the regulator described in the article has also been included. A TL084 operational amplifier has been used to implement said regulator.
In the file "Idealized quasi-resonant buck_Closed-loop small-signal loop-gain with 2kHz PWM Bode plot .asc" the peak detector is also included, with the intention of verifying that it does not significantly alter the dynamic behavior for frequencies less than 1 kHz, so the phase margin and the bandwidth calculated in the work are not significantly modified.
c. File for simulation of transient behavior
The LTspice file with the greatest similarity to the circuit used for experimental verification has the name "Quasi-resonant buck_Closed-loop with 2kHz PWM_Transient analisys.asc". In this file, the low drop-out current source has also been implemented and the ideal switch from the rest of the simulations has been replaced by the model of the mosfet used in the real circuit. The LED load used is based on the subcircuit “LED_load.asc” and the symbol file “LED_load.asy”, and the model parameter “ns” must be set to 40 to simulate the maximum output voltage (16.7V) and to 34 for the minimum (14.2V)