AMBA ASB Waveforms


AMBA specification defines protocol for Bus Architecture for data and control signals intercommunication among processors, memory and controller interfaces. Within a high-performance embedded system, multiple processors are fused to meet the specification of the design. Thus, a fitting Bus Architecture is to be implemented for efficient inter-communication of processors. Advanced System Bus is one such flavour of AMBA transfer protocols, designed for provision of communication of a modular system. This paper outlines the implementation of Advanced System Bus Architecture for a multi-master, multi-slave communication. The design fits in a protocol involving a set of masters to write or read data from a particular slave, wherein at a time only a single master is granted the Bus to perform the transaction.


The file 'wave.trn' has all dumped waveforms in it generated at simulation step by the Xilinx Vivado simulator.

License: Creative Commons Attribution


The file has waveforms dumped by the simulator.


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Dataset Details

Citation Author(s):
Ankit Berde
Submitted by:
ankit berde
Last updated:
Thu, 07/12/2018 - 12:23
Data Format:
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[1] Ankit Berde, "AMBA ASB Waveforms", IEEE Dataport, 2018. [Online]. Available: Accessed: Jul. 17, 2018.
doi = {10.21227/gtsr-vc89},
url = {},
author = {Ankit Berde },
publisher = {IEEE Dataport},
title = {AMBA ASB Waveforms},
year = {2018} }
T1 - AMBA ASB Waveforms
AU - Ankit Berde
PY - 2018
PB - IEEE Dataport
UR - 10.21227/gtsr-vc89
ER -
Ankit Berde. (2018). AMBA ASB Waveforms. IEEE Dataport.
Ankit Berde, 2018. AMBA ASB Waveforms. Available at:
Ankit Berde. (2018). "AMBA ASB Waveforms." Web.
1. Ankit Berde. AMBA ASB Waveforms [Internet]. IEEE Dataport; 2018. Available from :
Ankit Berde. "AMBA ASB Waveforms." doi: 10.21227/gtsr-vc89