The proposed SystemVerilog MESO models offer significantly faster simulation capabilities compared to the physical model [1], improving simulation speed while preserving essential accuracy. This enhancement enables the design of more complex circuits, including MESO cells, standard cells, and intellectual property (IP) blocks, while incorporating time multiplexing techniques.

DOI Link: 
10.21227/stw7-8b36
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[1] Tzuping Huang, "MESO standard cell models", IEEE Dataport, 2024. [Online]. Available: http://dx.doi.org/10.21227/stw7-8b36. Accessed: Mar. 22, 2025.
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doi = {10.21227/stw7-8b36},
url = {http://dx.doi.org/10.21227/stw7-8b36},
author = {Tzuping Huang },
publisher = {IEEE Dataport},
title = {MESO standard cell models},
year = {2024} }
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Tzuping Huang. (2024). MESO standard cell models. IEEE Dataport. http://dx.doi.org/10.21227/stw7-8b36
Tzuping Huang, 2024. MESO standard cell models. Available at: http://dx.doi.org/10.21227/stw7-8b36.
Tzuping Huang. (2024). "MESO standard cell models." Web.
1. Tzuping Huang. MESO standard cell models [Internet]. IEEE Dataport; 2024. Available from : http://dx.doi.org/10.21227/stw7-8b36
Tzuping Huang. "MESO standard cell models." doi: 10.21227/stw7-8b36